- List
- EU dual-use list – Annex I to Regulation (EU) 2021/821, updated annually
- Originating regime
- Thỏa ước Wassenaar
a. General purpose integrated circuits, as follows:
Note:
Integrated circuits include the following types:
—
"Monolithic integrated circuits";
—
"Hybrid integrated circuits";
—
"Multichip integrated circuits";
—
'Film type integrated circuit', including silicon-on-sapphire integrated circuits;
—
"Optical integrated circuits";
—
'Three dimensional integrated circuit';
—
"Monolithic Microwave Integrated Circuits" ("MMICs").
Technical Notes:
For the purposes of 3A001.a.:
1. 'Film type integrated circuit' is an array of "circuit elements" and metallic interconnections formed by deposition of a thick or thin film on an insulating "substrate".
2. 'Three dimensional integrated circuit' is a collection of semiconductor dies or active device layers, integrated together, and having through semiconductor via connections passing completely through an interposer, substrate, die or layer to establish interconnections between the device layers. An interposer is an interface that enables electrical connections.
1. Integrated circuits designed or rated as radiation hardened to withstand any of the following:
a. A total dose of 5 × 103 Gy (silicon) or higher;
b. A dose rate upset of 5 × 106 Gy (silicon)/s or higher; or
c. A fluence (integrated flux) of neutrons (1 MeV equivalent) of 5 × 1013 n/cm2 or higher on silicon, or its equivalent for other materials;
Note:
3A001.a.1.c. does not control Metal Insulator Semiconductors (MIS).
2. "Microprocessor microcircuits", "microcomputer microcircuits", microcontroller microcircuits, storage integrated circuits manufactured from a compound semiconductor, Analogue-to-Digital Converters (ADCs), integrated circuits that contain ADCs and store or process the digitised data, Digital-to-Analogue Converters (DACs), electro-optical or "optical integrated circuits" designed for "signal processing", field programmable logic devices, custom integrated circuits for which either the function is unknown or the control status of the equipment in which the integrated circuit will be used is unknown, Fast Fourier Transform (FFT) processors, Static Random-Access Memories (SRAMs), or 'non-volatile memories', having any of the following:
a. Rated for operation at an ambient temperature above 398 K (125 °C);
b. Rated for operation at an ambient temperature below 218 K (-55 °C); or
c. Rated for operation over the entire ambient temperature range from 218 K (-55 °C) to 398 K (125 °C);
Note:
3A001.a.2. does not control integrated circuits designed for civil automobiles or railway train applications.
Technical Note:
For the purposes of 3A001.a.2., 'non-volatile memories' are memories with data retention over a period of time after a power shutdown.
N.B. For cryogenic CMOS integrated circuits not specified in 3A001.a.2., see 3A501.a.15.
3. "Microprocessor microcircuits", "microcomputer microcircuits" and microcontroller microcircuits, manufactured from a compound semiconductor and operating at a clock frequency exceeding 40 MHz;
Note:
3A001.a.3. includes digital signal processors, digital array processors and digital coprocessors.
4. Not used;
5. Analogue-to-Digital Converter (ADC) and Digital-to-Analogue Converter (DAC) integrated circuits, as follows:
a. ADCs having any of the following:
N.B. SEE ALSO 3A101
1. A resolution of 8 bit or more, but less than 10 bit, with a "sample rate" greater than 1,3 Giga Samples Per Second (GSPS);
2. A resolution of 10 bit or more, but less than 12 bit, with a "sample rate" greater than 600 Mega Samples Per Second (MSPS);
3. A resolution of 12 bit or more, but less than 14 bit, with a "sample rate" greater than 400 MSPS;
4. A resolution of 14 bit or more, but less than 16 bit, with a "sample rate" greater than 250 MSPS; or
5. A resolution of 16 bit or more with a "sample rate" greater than 65 MSPS;
N.B. For integrated circuits that contain ADCsand store or process the digitised data, see 3A001.a.14.
Technical Notes:
For the purposes of 3A001.a.5.a.:
1. A resolution of n bit corresponds to a quantisation of 2n levels.
2. The resolution of the ADC is the number of bits of the digital output that represents the measured analogue input. Effective Number of Bits (ENOB) is not used to determine the resolution of the ADC.
3. For "multiple channel ADCs", the "sample rate" is not aggregated and the "sample rate" is the maximum rate of any single channel.
4. For "interleaved ADCs" or for "multiple channel ADCs" that are specified to have an interleaved mode of operation, the "sample rates" are aggregated and the "sample rate" is the maximum combined total rate of all of the interleaved channels.
b. DACs having any of the following:
1. A resolution of 10 bit or more, but less than 12 bit, with an 'adjusted update rate' exceeding 3 500 MSPS; or
2. A resolution of 12 bit or more and having any of the following:
a. An 'adjusted update rate' exceeding 1 250 MSPS but not exceeding 3 500 MSPS, and having any of the following:
1. A settling time less than 9 ns to arrive at or within 0,024 % of full scale from a full scale step; or
2. A 'Spurious Free Dynamic Range' (SFDR) greater than 68 dBc (carrier) when synthesising a full scale analogue signal of 100 MHz or the highest full scale analogue signal frequency specified below 100 MHz; or
b. An 'adjusted update rate' exceeding 3 500 MSPS;
Technical Notes:
For the purposes of 3A001.a.5.b.:
1. 'Spurious Free Dynamic Range' (SFDR) is defined as the ratio of the RMS value of the carrier frequency (maximum signal component) at the input of the DAC to the RMS value of the next largest noise or harmonic distortion component at its output.
2. SFDR is determined directly from the specification table or from the characterisation plots of SFDR versus frequency.
3. A signal is defined to be full scale when its amplitude is greater than -3 dBfs (full scale).
4. 'Adjusted update rate' for DACs:
a. For conventional (non-interpolating) DACs, the 'adjusted update rate' is the rate at which the digital signal is converted to an analogue signal and the output analogue values are changed by the DAC. For DACs where the interpolation mode may be bypassed (interpolation factor of one), the DAC should be considered as a conventional (non-interpolating) DAC.
b. For interpolating DACs (oversampling DACs), the 'adjusted update rate' is defined as the DAC update rate divided by the smallest interpolating factor. For interpolating DACs, the 'adjusted update rate' may be referred to by different terms including:
—
input data rate
—
input word rate
—
input sample rate
—
maximum total input bus rate
—
maximum DAC clock rate for DAC clock input.
6. Electro-optical and "optical integrated circuits", designed for "signal processing" and having all of the following:
a. One or more than one internal "laser" diode;
b. One or more than one internal light detecting element; and
c. Optical waveguides;
7. Field programmable logic devices having any of the following:
a. A maximum number of single-ended digital input/outputs of greater than 700; or
b. An 'aggregate one-way peak serial transceiver data rate' of 500 Gb/s or greater;
Note:
3A001.a.7. includes:
—
Complex Programmable Logic Devices (CPLDs);
—
Field Programmable Gate Arrays (FPGAs);
—
Field Programmable Logic Arrays (FPLAs);
—
Field Programmable Interconnects (FPICs).
N.B.1
For integrated circuits having field programmable logic devices that are combined with an ADC, see 3A001.a.14.
N.B.2
For "electronic assemblies", modules or equipment, containing one or more 'user configurable' Field Programmable Logic Devices (FPLDs), see 3A502.i.
Technical Notes:
For the purposes of 3A001.a.7.:
1. Maximum number of digital input/outputs in 3A001.a.7.a. is also referred to as the maximum user input/outputs or maximum available input/outputs, whether the integrated circuit is packaged or bare die.
2. 'Aggregate one-way peak serial transceiver data rate' is the product of the peak serial one-way transceiver data rate times the number of transceivers on the FPGA.
8. Not used;
9. Neural network integrated circuits;
N.B. For integrated circuits, having one or more digital processing units having a 'Total Processing Performance' ('TPP') of 6 000 or more, see 3A501.a.16.
10. Custom integrated circuits for which the function is unknown, or the control status of the equipment in which the integrated circuits will be used is unknown to the manufacturer, having any of the following:
a. More than 1 500 terminals;
b. A typical 'basic gate propagation delay time' of less than 0,02 ns; or
c. An operating frequency exceeding 3 GHz;
Technical Notes:
For the purposes of 3A001.a.10.b.:
1. 'Basic gate propagation delay time' is the propagation delay time value corresponding to the basic gate used in a "monolithic integrated circuit". For a 'family' of "monolithic integrated circuits", this may be specified either as the propagation delay time per typical gate within the given 'family' or as the typical propagation delay time per gate within the given 'family'.
2. 'Basic gate propagation delay time' is not to be confused with the input/output delay time of a complex "monolithic integrated circuit".
3. 'Family' consists of all integrated circuits to which all of the following are applied as their manufacturing methodology and specifications except their respective functions:
a. The common hardware and software architecture;
b. The common design and process technology;
and
c. The common basic characteristics.
11. Digital integrated circuits, other than those described in 3A001.a.3. to 3A001.a.10. and 3A001.a.12., based upon any compound semiconductor and having any of the following:
a. An equivalent gate count of more than 3 000 (2 input gates); or
b. A toggle frequency exceeding 1,2 GHz;
12. Fast Fourier Transform (FFT) processors having a rated execution time for an N-point complex FFT of less than (N log2 N) /20 480 ms, where N is the number of points;
Technical Note:
For the purposes of 3A001.a.12., when N is equal to 1 024 points, the formula gives an execution time of 500 μs.
13. Direct Digital Synthesizer (DDS) integrated circuits having any of the following:
a. A Digital-to-Analogue Converter (DAC) clock frequency of 3,5 GHz or more and a DAC resolution of 10 bit or more, but less than 12 bit; or
b. A DAC clock frequency of 1,25 GHz or more and a DAC resolution of 12 bit or more;
Technical Note:
For the purposes of 3A001.a.13., the DAC clock frequency may be specified as the master clock frequency or the input clock frequency.
14. Integrated circuits that perform or are programmable to perform all of the following:
a. Analogue-to-digital conversions meeting any of the following:
1. A resolution of 8 bit or more, but less than 10 bit, with a "sample rate" greater than 1,3 Giga Samples Per Second (GSPS);
2. A resolution of 10 bit or more, but less than 12 bit, with a "sample rate" greater than 1,0 GSPS;
3. A resolution of 12 bit or more, but less than 14 bit, with a "sample rate" greater than 1,0 GSPS;
4. A resolution of 14 bit or more, but less than 16 bit, with a "sample rate" greater than 400 Mega Samples Per Second (MSPS); or
5. A resolution of 16 bit or more with a "sample rate" greater than 180 MSPS; and
b. Any of the following:
1. Storage of digitised data; or
2. Processing of digitised data;
N.B.1.
For ADC integrated circuits, see 3A001.a.5.a.
N.B.2.
For field programmable logic devices, see 3A001.a.7.
Technical Notes:
For the purposes of 3A001.a.14.:
1. A resolution of n bit corresponds to a quantisation of 2 n levels.
2. The resolution of the ADC is the number of bits of the digital output of the ADC that represents the measured analogue input. Effective Number of Bits (ENOB) is not used to determine the resolution of the ADC.
3. For integrated circuits with non-interleaving "multiple channel ADCs", the "sample rate" is not aggregated and the "sample rate" is the maximum rate of any single channel.
4. For integrated circuits with "interleaved ADCs" or with "multiple channel ADCs" that are specified to have an interleaved mode of operation, the "sample rates" are aggregated and the "sample rate" is the maximum combined total rate of all of the interleaved channels.
b. Microwave or millimetre wave items as follows:
Technical Note:
For the purposes of 3A001.b., the parameter peak saturated power output may also be referred to on product data sheets as output power, saturated power output, maximum power output, peak power output, or peak envelope power output.
1. "Vacuum electronic devices" and cathodes, as follows:
Note 1:
3A001.b.1. does not control "vacuum electronic devices" designed or rated for operation in any frequency band and having all of the following:
a. Does not exceed 31,8 GHz;
and
b. Is "allocated by the ITU" for radio-communications services, but not for radio-determination.
Note 2:
3A001.b.1. does not control non-"space-qualified" "vacuum electronic devices" having all of the following:
a. An average output power equal to or less than 50 W;
and
b. Designed or rated for operation in any frequency band and having all of the following:
1. Exceeds 31,8 GHz but does not exceed 43,5 GHz;
and
2. Is "allocated by the ITU" for radio-communications services, but not for radio-determination.
a. Travelling-wave "vacuum electronic devices", pulsed or continuous wave, as follows:
1. Devices operating at frequencies exceeding 31,8 GHz;
2. Devices having a cathode heater with a turn on time to rated RF power of less than 3 seconds;
3. Coupled cavity devices, or derivatives thereof, with a "fractional bandwidth" of more than 7 % or a peak power exceeding 2,5 kW;
4. Devices based on helix, folded waveguide, or serpentine waveguide circuits, or derivatives thereof, having any of the following:
a. An "instantaneous bandwidth" of more than one octave, and average power (expressed in kW) times frequency (expressed in GHz) of more than 0,5;
b. An "instantaneous bandwidth" of one octave or less, and average power (expressed in kW) times frequency (expressed in GHz) of more than 1;
c. Being "space-qualified"; or
d. Having a gridded electron gun;
5. Devices with a "fractional bandwidth" greater than or equal to 10 %, with any of the following:
a. An annular electron beam;
b. A non-axisymmetric electron beam; or
c. Multiple electron beams;
b. Crossed-field amplifier "vacuum electronic devices" with a gain of more than 17 dB;
c. Thermionic cathodes designed for "vacuum electronic devices" producing an emission current density at rated operating conditions exceeding 5 A/cm2 or a pulsed (non-continuous) current density at rated operating conditions exceeding 10 A/cm2;
d. "Vacuum electronic devices" with the capability to operate in a 'dual mode';
Technical Note:
For the purposes of 3A001.b.1.d., 'dual mode' means the "vacuum electronic device" beam current can be intentionally changed between continuous-wave and pulsed mode operation by use of a grid and produces a peak pulse output power greater than the continuous-wave output power.
2. "Monolithic Microwave Integrated Circuits" ("MMIC") amplifiers that are any of the following:
N.B. For "MMIC" amplifiers that have an integrated phase shifter, see 3A001.b.12.
a. Rated for operation at frequencies exceeding 2,7 GHz up to and including 6,8 GHz with a "fractional bandwidth" greater than 15 %, and having any of the following:
1. A peak saturated power output greater than 75 W (48,75 dBm) at any frequency exceeding 2,7 GHz up to and including 2,9 GHz;
2. A peak saturated power output greater than 55 W (47,4 dBm) at any frequency exceeding 2,9 GHz up to and including 3,2 GHz;
3. A peak saturated power output greater than 40 W (46 dBm) at any frequency exceeding 3,2 GHz up to and including 3,7 GHz; or
4. A peak saturated power output greater than 20 W (43 dBm) at any frequency exceeding 3,7 GHz up to and including 6,8 GHz;
b. Rated for operation at frequencies exceeding 6,8 GHz up to and including 16 GHz with a "fractional bandwidth" greater than 10 %, and having any of the following:
1. A peak saturated power output greater than 10 W (40 dBm) at any frequency exceeding 6,8 GHz up to and including 8,5 GHz; or
2. A peak saturated power output greater than 5 W (37 dBm) at any frequency exceeding 8,5 GHz up to and including 16 GHz;
c. Rated for operation with a peak saturated power output greater than 3 W (34,77 dBm) at any frequency exceeding 16 GHz up to and including 31,8 GHz, and with a "fractional bandwidth" of greater than 10 %;
d. Rated for operation with a peak saturated power output greater than 0,1 nW (-70 dBm) at any frequency exceeding 31,8 GHz up to and including 37 GHz;
e. Rated for operation with a peak saturated power output greater than 1 W (30 dBm) at any frequency exceeding 37 GHz up to and including 43,5 GHz, and with a "fractional bandwidth" of greater than 10 %;
f. Rated for operation with a peak saturated power output greater than 31,62 mW (15 dBm) at any frequency exceeding 43,5 GHz up to and including 75 GHz, and with a "fractional bandwidth" of greater than 10 %;
g. Rated for operation with a peak saturated power output greater than 10 mW (10 dBm) at any frequency exceeding 75 GHz up to and including 90 GHz, and with a "fractional bandwidth" of greater than 5 %; or
h. Rated for operation with a peak saturated power output greater than 0,1 nW (-70 dBm) at any frequency exceeding 90 GHz;
Note 1:
Not used.
Note 2:
The control status of the "MMIC" whose rated operating frequency includes frequencies listed in more than one frequency range, as defined by 3A001.b.2.a. to 3A001.b.2.h., is determined by the lowest peak saturated power output threshold.
Note 3:
Notes 1 and 2 in 3A mean that 3A001.b.2. does not control "MMICs" if they are specially designed for other applications, e.g., telecommunications, radar, automobiles.
3. Discrete microwave transistors that are any of the following:
a. Rated for operation at frequencies exceeding 2,7 GHz up to and including 6,8 GHz and having any of the following:
1. A peak saturated power output greater than 400 W (56 dBm) at any frequency exceeding 2,7 GHz up to and including 2,9 GHz;
2. A peak saturated power output greater than 205 W (53,12 dBm) at any frequency exceeding 2,9 GHz up to and including 3,2 GHz;
3. A peak saturated power output greater than 115 W (50,61 dBm) at any frequency exceeding 3,2 GHz up to and including 3,7 GHz; or
4. A peak saturated power output greater than 60 W (47,78 dBm) at any frequency exceeding 3,7 GHz up to and including 6,8 GHz;
b. Rated for operation at frequencies exceeding 6,8 GHz up to and including 31,8 GHz and having any of the following:
1. A peak saturated power output greater than 50 W (47 dBm) at any frequency exceeding 6,8 GHz up to and including 8,5 GHz;
2. A peak saturated power output greater than 15 W (41,76 dBm) at any frequency exceeding 8,5 GHz up to and including 12 GHz;
3. A peak saturated power output greater than 40 W (46 dBm) at any frequency exceeding 12 GHz up to and including 16 GHz; or
4. A peak saturated power output greater than 7 W (38,45 dBm) at any frequency exceeding 16 GHz up to and including 31,8 GHz;
c. Rated for operation with a peak saturated power output greater than 0,5 W (27 dBm) at any frequency exceeding 31,8 GHz up to and including 37 GHz;
d. Rated for operation with a peak saturated power output greater than 1 W (30 dBm) at any frequency exceeding 37 GHz up to and including 43,5 GHz;
e. Rated for operation with a peak saturated power output greater than 0,1 nW (-70 dBm) at any frequency exceeding 43,5 GHz; or
f. Other than those specified in 3A001.b.3.a. to 3A001.b.3.e and rated for operation with a peak saturated power output greater than 5 W (37,0 dBm) at all frequencies exceeding 8,5 GHz up to and including 31,8 GHz;
Note 1:
The control status of a transistor in 3A001.b.3.a. to 3A001.b.3.e. whose rated operating frequency includes frequencies listed in more than one frequency range, as defined by 3A001.b.3.a. to 3A001.b.3.e., is determined by the lowest peak saturated power output threshold.
Note 2:
3A001.b.3. includes bare dice, dice mounted on carriers, or dice mounted in packages. Some discrete transistors may also be referred to as power amplifiers, but the status of these discrete transistors is determined by 3A001.b.3.
4. Microwave solid-state amplifiers and microwave assemblies/modules containing microwave solid-state amplifiers, that are any of the following:
a. Rated for operation at frequencies exceeding 2,7 GHz up to and including 6,8 GHz with a "fractional bandwidth" greater than 15 %, and having any of the following:
1. A peak saturated power output greater than 500 W (57 dBm) at any frequency exceeding 2,7 GHz up to and including 2,9 GHz;
2. A peak saturated power output greater than 270 W (54,3 dBm) at any frequency exceeding 2,9 GHz up to and including 3,2 GHz;
3. A peak saturated power output greater than 200 W (53 dBm) at any frequency exceeding 3,2 GHz up to and including 3,7 GHz; or
4. A peak saturated power output greater than 90 W (49,54 dBm) at any frequency exceeding 3,7 GHz up to and including 6,8 GHz;
b. Rated for operation at frequencies exceeding 6,8 GHz up to and including 31,8 GHz with a "fractional bandwidth" greater than 10 %, and having any of the following:
1. A peak saturated power output greater than 70 W (48,45 dBm) at any frequency exceeding 6,8 GHz up to and including 8,5 GHz;
2. A peak saturated power output greater than 50 W (47 dBm) at any frequency exceeding 8,5 GHz up to and including 12 GHz;
3. A peak saturated power output greater than 30 W (44,77 dBm) at any frequency exceeding 12 GHz up to and including 16 GHz; or
4. A peak saturated power output greater than 20 W (43 dBm) at any frequency exceeding 16 GHz up to and including 31,8 GHz;
c. Rated for operation with a peak saturated power output greater than 0,5 W (27 dBm) at any frequency exceeding 31,8 GHz up to and including 37 GHz;
d. Rated for operation with a peak saturated power output greater than 2 W (33 dBm) at any frequency exceeding 37 GHz up to and including 43,5 GHz, and with a "fractional bandwidth" of greater than 10 %;
e. Rated for operation at frequencies exceeding 43,5 GHz and having any of the following:
1. A peak saturated power output greater than 0,2 W (23 dBm) at any frequency exceeding 43,5 GHz up to and including 75 GHz, and with a "fractional bandwidth" of greater than 10 %;
2. A peak saturated power output greater than 20 mW (13 dBm) at any frequency exceeding 75 GHz up to and including 90 GHz, and with a "fractional bandwidth" of greater than 5 %; or
3. A peak saturated power output greater than 0,1 nW (-70 dBm) at any frequency exceeding 90 GHz;
f. Not used;
N.B.1.
For "MMIC" amplifiers, see 3A001.b.2.
N.B.2.
For 'transmit/receive modules' and 'transmit modules', see 3A001.b.12.
N.B.3.
For converters and harmonic mixers, designed to extend the operating or frequency range of signal analysers, signal generators, network analysers or microwave test receivers, see 3A001.b.7.
Note 1:
Not used.
Note 2:
The control status of an item whose rated operating frequency includes frequencies listed in more than one frequency range, as defined by 3A001.b.4.a. to 3A001.b.4.e., is determined by the lowest peak saturated power output threshold.
5. Electronically or magnetically tunable band-pass or band-stop filters, having more than 5 tunable resonators capable of tuning across a 1,5:1 frequency band (fmax/fmin) in less than 10 μs and having any of the following:
a. A band-pass bandwidth of more than 0,5 % of centre frequency; or
b. A band-stop bandwidth of less than 0,5 % of centre frequency;
6. Not used;
7. Converters and harmonic mixers that are any of the following:
a. Designed to extend the frequency range of "signal analysers" beyond 110 GHz;
b. Designed to extend the operating range of signal generators as follows:
1. Beyond 110 GHz;
2. To an output power greater than 100 mW (20 dBm) anywhere within the frequency range exceeding 43,5 GHz but not exceeding 110 GHz;
c. Designed to extend the operating range of network analysers as follows:
1. Beyond 110 GHz;
2. To an output power greater than 100 mW (20 dBm) anywhere within the frequency range exceeding 43,5 GHz but not exceeding 110 GHz;
3. Not used;
d. Designed to extend the frequency range of microwave test receivers beyond 110 GHz;
8. Microwave power amplifiers containing "vacuum electronic devices" specified in 3A001.b.1. and having all of the following:
a. Operating frequencies above 3 GHz;
b. An average output power to mass ratio exceeding 80 W/kg; and
c. A volume of less than 400 cm3;
Note:
3A001.b.8. does not control equipment designed or rated for operation in any frequency band which is "allocated by the ITU" for radio-communications services, but not for radio-determination.
9. Microwave power modules (MPM) consisting of, at least, a travelling wave "vacuum electronic device", a "monolithic microwave integrated circuit" ("MMIC") and an integrated electronic power conditioner and having all of the following:
a. A 'turn-on time' from off to fully operational in less than 10 seconds;
b. A volume less than the maximum rated power in Watts multiplied by 10 cm3/W; and
c. An "instantaneous bandwidth" greater than 1 octave (fmax > 2fmin) and having any of the following:
1. For frequencies equal to or less than 18 GHz, an RF output power greater than 100 W; or
2. A frequency greater than 18 GHz;
Technical Notes:
1. For the purposes of 3A001.b.9.a. the 'turn-on time' refers to the time from fully-off to fully operational, i.e., it includes the warm-up time of the MPM.
2. For the purposes of 3A001.b.9.b., the following example is provided to calculate the volume: for a maximum rated power of 20 W, the volume would be: 20 W × 10 cm3/W = 200 cm3.
10. Oscillators or oscillator assemblies, specified to operate with a single sideband (SSB) phase noise, in dBc/Hz, less (better) than -(126 + 20log10F - 20log10f) anywhere within the range of 10 Hz ≤ F ≤ 10 kHz;
Technical Note:
For the purposes of 3A001.b.10., F is the offset from the operating frequency in Hz and f is the operating frequency in MHz.
11. 'Frequency synthesizer' "electronic assemblies" having a "frequency switching time" as specified by any of the following:
a. Less than 143 ps;
b. Less than 100 μs for any frequency change exceeding 2,2 GHz within the synthesised frequency range exceeding 4,8 GHz but not exceeding 31,8 GHz;
c. Not used;
d. Less than 500 μs for any frequency change exceeding 550 MHz within the synthesised frequency range exceeding 31,8 GHz but not exceeding 37 GHz;
e. Less than 100 μs for any frequency change exceeding 2,2 GHz within the synthesised frequency range exceeding 37 GHz but not exceeding 75 GHz;
f. Less than 100 μs for any frequency change exceeding 5,0 GHz within the synthesised frequency range exceeding 75 GHz but not exceeding 90 GHz; or
g. Less than 1 ms within the synthesised frequency range exceeding 90 GHz;
Technical Note:
For the purposes of 3A001.b.11., a 'frequency synthesizer' is any kind of frequency source, regardless of the actual technique used, providing a multiplicity of simultaneous or alternative output frequencies, from one or more outputs, controlled by, derived from or disciplined by a lesser number of standard (or master) frequencies.
N.B. For general purpose "signal analysers", signal generators, network analysers and microwave test receivers, see 3A002.c., 3A002.d., 3A002.e. and 3A002.f., respectively.
12. 'Transmit/receive modules', 'transmit/receive MMICs', 'transmit modules', and 'transmit MMICs', rated for operation at frequencies above 2,7 GHz and having all of the following:
a. A peak saturated power output (in watts), Psat, greater than 505,62 divided by the maximum operating frequency (in GHz) squared [Psat>505,62 W × GHz2/fGHz
2] for any channel;
b. A "fractional bandwidth" of 5 % or greater for any channel;
c. Any planar side with length d (in cm) equal to or less than 15 divided by the lowest operating frequency in GHz [d ≤ 15cm × GHz × N/fGHz] where N is the number of transmit or transmit/receive channels; and
d. An electronically variable phase shifter per channel.
Technical Notes:
For the purposes of 3A001.b.12.:
1. A 'transmit/receive module' is a multifunction "electronic assembly" that provides bi-directional amplitude and phase control for transmission and reception of signals.
2. A 'transmit module' is an "electronic assembly" that provides amplitude and phase control for transmission of signals.
3. A 'transmit/receive MMIC': is a multifunction "MMIC" that provides bi-directional amplitude and phase control for transmission and reception of signals.
4. A 'transmit MMIC' is a "MMIC" that provides amplitude and phase control for transmission of signals.
5. 2,7 GHz should be used as the lowest operating frequency (fGHz) in the formula in 3A001.b.12.c. for transmit/receive or transmit modules that have a rated operation range extending downward to 2,7 GHz and below [d≤15cm × GHz × N/2,7 GHz].
6. 3A001.b.12. applies to 'transmit/receive modules' or 'transmit modules' with or without a heat sink. The value of d in 3A001.b.12.c. does not include any portion of the 'transmit/receive module' or 'transmit module' that functions as a heat sink.
7. 'Transmit/receive modules', or 'transmit modules', or 'transmit/receive MMICs' or 'transmit MMICs' may or may not have N integrated radiating antenna elements where N is the number of transmit or transmit/receive channels.
c. Acoustic wave devices as follows and specially designed components therefor:
1. Surface acoustic wave and surface skimming (shallow bulk) acoustic wave devices, having any of the following:
a. A carrier frequency exceeding 6 GHz;
b. A carrier frequency exceeding 1 GHz but not exceeding 6 GHz and having any of the following:
1. A 'frequency side-lobe rejection' exceeding 65 dB;
2. A product of the maximum delay time and the bandwidth (time in μs and bandwidth in MHz) of more than 100;
3. A bandwidth greater than 250 MHz; or
4. A dispersive delay of more than 10 μs; or
c. A carrier frequency of 1 GHz or less and having any of the following:
1. A product of the maximum delay time and the bandwidth (time in μs and bandwidth in MHz) of more than 100;
2. A dispersive delay of more than 10 μs; or
3. A 'frequency side-lobe rejection' exceeding 65 dB and a bandwidth greater than 100 MHz;
Technical Note:
For the purposes of 3A001.c.1., 'frequency side-lobe rejection' is the maximum rejection value specified in data sheet.
2. Bulk (volume) acoustic wave devices which permit the direct processing of signals at frequencies exceeding 6 GHz;
3. Acoustic-optic "signal processing" devices employing interaction between acoustic waves (bulk wave or surface wave) and light waves which permit the direct processing of signals or images, including spectral analysis, correlation or convolution;
Note:
3A001.c. does not control acoustic wave devices that are limited to a single band pass, low pass, high pass or notch filtering, or resonating function.
d. Electronic devices and circuits containing components, manufactured from "superconductive" materials, specially designed for operation at temperatures below the "critical temperature" of at least one of the "superconductive" constituents and having any of the following:
1. Current switching for digital circuits using "superconductive" gates with a product of delay time per gate (in seconds) and power dissipation per gate (in watts) of less than 10-14 J; or
2. Frequency selection at all frequencies using resonant circuits with Q-values exceeding 10 000 ;
e. High energy devices as follows:
1. 'Cells' as follows:
a. 'Primary cells' having any of the following at 20 °C;
1. 'Energy density' exceeding 550 Wh/kg and a 'continuous power density' exceeding 50 W/kg; or
2. 'Energy density' exceeding 50 Wh/kg and a 'continuous power density' exceeding 350 W/kg; or
b. 'Secondary cells' having an 'energy density' exceeding 350 Wh/kg at 20 °C;
Technical Notes:
1. For the purposes of 3A001.e.1., 'energy density' (Wh/kg) is calculated from the nominal voltage multiplied by the nominal capacity in ampere-hours (Ah) divided by the mass in kilograms. If the nominal capacity is not stated, energy density is calculated from the nominal voltage squared then multiplied by the discharge duration in hours divided by the discharge load in ohms and the mass in kilograms.
2. For the purposes of 3A001.e.1., a 'cell' is defined as an electrochemical device, which has positive and negative electrodes, an electrolyte, and is a source of electrical energy. It is the basic building block of a battery.
3. For the purposes of 3A001.e.1.a., a 'primary cell' is a 'cell' that is not designed to be charged by any other source.
4. For the purposes of 3A001.e.1.b., a 'secondary cell' is a 'cell' that is designed to be charged by an external electrical source.
5. For the purposes of 3A001.e.1.a., 'continuous power density' (W/kg) is calculated from the nominal voltage multiplied by the specified maximum continuous discharge current in amperes (A) divided by the mass in kilograms. 'Continuous power density' is also referred to as specific power.
Note:
3A001.e.1. does not control batteries, including single-cell batteries.
2. High energy storage capacitors as follows:
N.B. SEE ALSO 3A201.a. and the Military Goods Controls.
a. Capacitors with a repetition rate of less than 10 Hz (single shot capacitors) and having all of the following:
1. A voltage rating equal to or more than 5 kV;
2. An energy density equal to or more than 250 J/kg; and
3. A total energy equal to or more than 25 kJ;
b. Capacitors with a repetition rate of 10 Hz or more (repetition rated capacitors) and having all of the following:
1. A voltage rating equal to or more than 5 kV;
2. An energy density equal to or more than 50 J/kg;
3. A total energy equal to or more than 100 J; and
4. A charge/discharge cycle life equal to or more than 10 000 ;
3. "Superconductive" electromagnets and solenoids, specially designed to be fully charged or discharged in less than one second and having all of the following:
N.B. SEE ALSO 3A201.b.
Note:
3A001.e.3. does not control "superconductive" electromagnets or solenoids specially designed for Magnetic Resonance Imaging (MRI) medical equipment.
a. Energy delivered during the discharge exceeding 10 kJ in the first second;
b. Inner diameter of the current carrying windings of more than 250 mm; and
c. Rated for a magnetic induction of more than 8 T or 'overall current density' in the winding of more than 300 A/mm2;
Technical Note:
For the purposes of 3A001.e.3.c., 'overall current density' is the total number of ampere-turns in the coil (i.e., the sum of the number of turns multiplied by the maximum current carried by each turn) divided by the total cross-section of the coil (comprising the superconducting filaments, the metallic matrix in which the superconducting filaments are embedded, the encapsulating material, any cooling channels, etc.).
4. Solar cells, cell-interconnect-coverglass (CIC) assemblies, solar panels, and solar arrays, which are "space-qualified", having a minimum average efficiency exceeding 20 % at an operating temperature of 301 K (28 °C) under simulated 'AM0' illumination with an irradiance of 1 367 watts per square metre (W/m2);
Technical Note:
For the purposes of 3A001.e.4., 'AM0', or 'Air Mass Zero', refers to the spectral irradiance of sun light in the earth's outer atmosphere when the distance between the earth and sun is one astronomical unit (AU).
f. Rotary input type absolute position encoders having an "accuracy" equal to or less (better) than 1,0 second of arc and specially designed encoder rings, discs or scales therefor;
g. Solid-state pulsed power switching thyristor devices and 'thyristor modules', using either electrically, optically, or electron radiation controlled switch methods and having any of the following:
1. A maximum turn-on current rate of rise (di/dt) greater than 30 000 A/μs and off-state voltage greater than 1 100 V; or
2. A maximum turn-on current rate of rise (di/dt) greater than 2 000 A/μs and having all of the following:
a. An off-state peak voltage equal to or greater than 3 000 V; and
b. A peak (surge) current equal to or greater than 3 000 A.
Note 1:
3A001.g. includes:
—
Silicon Controlled Rectifiers (SCRs);
—
Electrical Triggering Thyristors (ETTs);
—
Light Triggering Thyristors (LTTs);
—
Integrated Gate Commutated Thyristors (IGCTs);
—
Gate Turn-off Thyristors (GTOs);
—
MOS Controlled Thyristors (MCTs);
—
Solidtrons.
Note 2:
3A001.g. does not control thyristor devices and 'thyristor modules' incorporated into equipment designed for civil railway or "civil aircraft" applications.
Technical Note:
For the purposes of 3A001.g., a 'thyristor module' contains one or more thyristor devices.
h. Solid-state power semiconductor switches, diodes, or 'modules', having all of the following:
1. Rated for a maximum operating junction temperature greater than 488 K (215 °C);
2. Repetitive peak off-state voltage (blocking voltage) exceeding 300 V; and
3. Continuous current greater than 1 A.
Note 1:
Repetitive peak off-state voltage in 3A001.h. includes drain to source voltage, collector to emitter voltage, repetitive peak reverse voltage and peak repetitive off-state blocking voltage.
Note 2:
3A001.h. includes:
—
Junction Field Effect Transistors (JFETs);
—
Vertical Junction Field Effect Transistors (VJFETs);
—
Metal Oxide Semiconductor Field Effect Transistors (MOSFETs);
—
Double Diffused Metal Oxide Semiconductor Field Effect Transistor (DMOSFET);
—
Insulated Gate Bipolar Transistor (IGBT);
—
High Electron Mobility Transistors (HEMTs);
—
Bipolar Junction Transistors (BJTs);
—
Thyristors and Silicon Controlled Rectifiers (SCRs);
—
Gate Turn-Off Thyristors (GTOs);
—
Emitter Turn-Off Thyristors (ETOs);
—
PiN Diodes;
—
Schottky Diodes.
Note 3:
3A001.h. does not control switches, diodes, or 'modules', incorporated into equipment designed for civil automobile, civil railway or "civil aircraft" applications.
Technical Note:
For the purposes of 3A001.h., 'modules' contain one or more solid-state power semiconductor switches or diodes.
i. Intensity, amplitude, or phase electro-optic modulators, designed for analogue signals and having any of the following:
1. A maximum operating frequency of more than 10 GHz but less than 20 GHz, an optical insertion loss equal to or less than 3 dB and having any of the following:
a. A 'half-wave voltage' ('Vπ') less than 2,7 V when measured at a frequency of 1 GHz or below; or
b. A 'Vπ' of less than 4 V when measured at a frequency of more than 1 GHz; or
2. A maximum operating frequency equal to or greater than 20 GHz, an optical insertion loss equal to or less than 3 dB and having any of the following:
a. A 'Vπ' less than 3,3 V when measured at a frequency of 1 GHz or below; or
b. A 'Vπ' less than 5 V when measured at a frequency of more than 1 GHz.
Note:
3A001.i. includes electro-optic modulators having optical input and output connectors (e.g., fibre-optic pigtails).
Technical Note:
For the purposes of 3A001.i., a 'half-wave voltage' ('Vπ') is the applied voltage necessary to make a phase change of 180 degrees in the wavelength of light propagating through the optical modulator.
Note:
Integrated circuits include the following types:
—
"Monolithic integrated circuits";
—
"Hybrid integrated circuits";
—
"Multichip integrated circuits";
—
'Film type integrated circuit', including silicon-on-sapphire integrated circuits;
—
"Optical integrated circuits";
—
'Three dimensional integrated circuit';
—
"Monolithic Microwave Integrated Circuits" ("MMICs").
Technical Notes:
For the purposes of 3A001.a.:
1. 'Film type integrated circuit' is an array of "circuit elements" and metallic interconnections formed by deposition of a thick or thin film on an insulating "substrate".
2. 'Three dimensional integrated circuit' is a collection of semiconductor dies or active device layers, integrated together, and having through semiconductor via connections passing completely through an interposer, substrate, die or layer to establish interconnections between the device layers. An interposer is an interface that enables electrical connections.
1. Integrated circuits designed or rated as radiation hardened to withstand any of the following:
a. A total dose of 5 × 103 Gy (silicon) or higher;
b. A dose rate upset of 5 × 106 Gy (silicon)/s or higher; or
c. A fluence (integrated flux) of neutrons (1 MeV equivalent) of 5 × 1013 n/cm2 or higher on silicon, or its equivalent for other materials;
Note:
3A001.a.1.c. does not control Metal Insulator Semiconductors (MIS).
2. "Microprocessor microcircuits", "microcomputer microcircuits", microcontroller microcircuits, storage integrated circuits manufactured from a compound semiconductor, Analogue-to-Digital Converters (ADCs), integrated circuits that contain ADCs and store or process the digitised data, Digital-to-Analogue Converters (DACs), electro-optical or "optical integrated circuits" designed for "signal processing", field programmable logic devices, custom integrated circuits for which either the function is unknown or the control status of the equipment in which the integrated circuit will be used is unknown, Fast Fourier Transform (FFT) processors, Static Random-Access Memories (SRAMs), or 'non-volatile memories', having any of the following:
a. Rated for operation at an ambient temperature above 398 K (125 °C);
b. Rated for operation at an ambient temperature below 218 K (-55 °C); or
c. Rated for operation over the entire ambient temperature range from 218 K (-55 °C) to 398 K (125 °C);
Note:
3A001.a.2. does not control integrated circuits designed for civil automobiles or railway train applications.
Technical Note:
For the purposes of 3A001.a.2., 'non-volatile memories' are memories with data retention over a period of time after a power shutdown.
N.B. For cryogenic CMOS integrated circuits not specified in 3A001.a.2., see 3A501.a.15.
3. "Microprocessor microcircuits", "microcomputer microcircuits" and microcontroller microcircuits, manufactured from a compound semiconductor and operating at a clock frequency exceeding 40 MHz;
Note:
3A001.a.3. includes digital signal processors, digital array processors and digital coprocessors.
4. Not used;
5. Analogue-to-Digital Converter (ADC) and Digital-to-Analogue Converter (DAC) integrated circuits, as follows:
a. ADCs having any of the following:
N.B. SEE ALSO 3A101
1. A resolution of 8 bit or more, but less than 10 bit, with a "sample rate" greater than 1,3 Giga Samples Per Second (GSPS);
2. A resolution of 10 bit or more, but less than 12 bit, with a "sample rate" greater than 600 Mega Samples Per Second (MSPS);
3. A resolution of 12 bit or more, but less than 14 bit, with a "sample rate" greater than 400 MSPS;
4. A resolution of 14 bit or more, but less than 16 bit, with a "sample rate" greater than 250 MSPS; or
5. A resolution of 16 bit or more with a "sample rate" greater than 65 MSPS;
N.B. For integrated circuits that contain ADCsand store or process the digitised data, see 3A001.a.14.
Technical Notes:
For the purposes of 3A001.a.5.a.:
1. A resolution of n bit corresponds to a quantisation of 2n levels.
2. The resolution of the ADC is the number of bits of the digital output that represents the measured analogue input. Effective Number of Bits (ENOB) is not used to determine the resolution of the ADC.
3. For "multiple channel ADCs", the "sample rate" is not aggregated and the "sample rate" is the maximum rate of any single channel.
4. For "interleaved ADCs" or for "multiple channel ADCs" that are specified to have an interleaved mode of operation, the "sample rates" are aggregated and the "sample rate" is the maximum combined total rate of all of the interleaved channels.
b. DACs having any of the following:
1. A resolution of 10 bit or more, but less than 12 bit, with an 'adjusted update rate' exceeding 3 500 MSPS; or
2. A resolution of 12 bit or more and having any of the following:
a. An 'adjusted update rate' exceeding 1 250 MSPS but not exceeding 3 500 MSPS, and having any of the following:
1. A settling time less than 9 ns to arrive at or within 0,024 % of full scale from a full scale step; or
2. A 'Spurious Free Dynamic Range' (SFDR) greater than 68 dBc (carrier) when synthesising a full scale analogue signal of 100 MHz or the highest full scale analogue signal frequency specified below 100 MHz; or
b. An 'adjusted update rate' exceeding 3 500 MSPS;
Technical Notes:
For the purposes of 3A001.a.5.b.:
1. 'Spurious Free Dynamic Range' (SFDR) is defined as the ratio of the RMS value of the carrier frequency (maximum signal component) at the input of the DAC to the RMS value of the next largest noise or harmonic distortion component at its output.
2. SFDR is determined directly from the specification table or from the characterisation plots of SFDR versus frequency.
3. A signal is defined to be full scale when its amplitude is greater than -3 dBfs (full scale).
4. 'Adjusted update rate' for DACs:
a. For conventional (non-interpolating) DACs, the 'adjusted update rate' is the rate at which the digital signal is converted to an analogue signal and the output analogue values are changed by the DAC. For DACs where the interpolation mode may be bypassed (interpolation factor of one), the DAC should be considered as a conventional (non-interpolating) DAC.
b. For interpolating DACs (oversampling DACs), the 'adjusted update rate' is defined as the DAC update rate divided by the smallest interpolating factor. For interpolating DACs, the 'adjusted update rate' may be referred to by different terms including:
—
input data rate
—
input word rate
—
input sample rate
—
maximum total input bus rate
—
maximum DAC clock rate for DAC clock input.
6. Electro-optical and "optical integrated circuits", designed for "signal processing" and having all of the following:
a. One or more than one internal "laser" diode;
b. One or more than one internal light detecting element; and
c. Optical waveguides;
7. Field programmable logic devices having any of the following:
a. A maximum number of single-ended digital input/outputs of greater than 700; or
b. An 'aggregate one-way peak serial transceiver data rate' of 500 Gb/s or greater;
Note:
3A001.a.7. includes:
—
Complex Programmable Logic Devices (CPLDs);
—
Field Programmable Gate Arrays (FPGAs);
—
Field Programmable Logic Arrays (FPLAs);
—
Field Programmable Interconnects (FPICs).
N.B.1
For integrated circuits having field programmable logic devices that are combined with an ADC, see 3A001.a.14.
N.B.2
For "electronic assemblies", modules or equipment, containing one or more 'user configurable' Field Programmable Logic Devices (FPLDs), see 3A502.i.
Technical Notes:
For the purposes of 3A001.a.7.:
1. Maximum number of digital input/outputs in 3A001.a.7.a. is also referred to as the maximum user input/outputs or maximum available input/outputs, whether the integrated circuit is packaged or bare die.
2. 'Aggregate one-way peak serial transceiver data rate' is the product of the peak serial one-way transceiver data rate times the number of transceivers on the FPGA.
8. Not used;
9. Neural network integrated circuits;
N.B. For integrated circuits, having one or more digital processing units having a 'Total Processing Performance' ('TPP') of 6 000 or more, see 3A501.a.16.
10. Custom integrated circuits for which the function is unknown, or the control status of the equipment in which the integrated circuits will be used is unknown to the manufacturer, having any of the following:
a. More than 1 500 terminals;
b. A typical 'basic gate propagation delay time' of less than 0,02 ns; or
c. An operating frequency exceeding 3 GHz;
Technical Notes:
For the purposes of 3A001.a.10.b.:
1. 'Basic gate propagation delay time' is the propagation delay time value corresponding to the basic gate used in a "monolithic integrated circuit". For a 'family' of "monolithic integrated circuits", this may be specified either as the propagation delay time per typical gate within the given 'family' or as the typical propagation delay time per gate within the given 'family'.
2. 'Basic gate propagation delay time' is not to be confused with the input/output delay time of a complex "monolithic integrated circuit".
3. 'Family' consists of all integrated circuits to which all of the following are applied as their manufacturing methodology and specifications except their respective functions:
a. The common hardware and software architecture;
b. The common design and process technology;
and
c. The common basic characteristics.
11. Digital integrated circuits, other than those described in 3A001.a.3. to 3A001.a.10. and 3A001.a.12., based upon any compound semiconductor and having any of the following:
a. An equivalent gate count of more than 3 000 (2 input gates); or
b. A toggle frequency exceeding 1,2 GHz;
12. Fast Fourier Transform (FFT) processors having a rated execution time for an N-point complex FFT of less than (N log2 N) /20 480 ms, where N is the number of points;
Technical Note:
For the purposes of 3A001.a.12., when N is equal to 1 024 points, the formula gives an execution time of 500 μs.
13. Direct Digital Synthesizer (DDS) integrated circuits having any of the following:
a. A Digital-to-Analogue Converter (DAC) clock frequency of 3,5 GHz or more and a DAC resolution of 10 bit or more, but less than 12 bit; or
b. A DAC clock frequency of 1,25 GHz or more and a DAC resolution of 12 bit or more;
Technical Note:
For the purposes of 3A001.a.13., the DAC clock frequency may be specified as the master clock frequency or the input clock frequency.
14. Integrated circuits that perform or are programmable to perform all of the following:
a. Analogue-to-digital conversions meeting any of the following:
1. A resolution of 8 bit or more, but less than 10 bit, with a "sample rate" greater than 1,3 Giga Samples Per Second (GSPS);
2. A resolution of 10 bit or more, but less than 12 bit, with a "sample rate" greater than 1,0 GSPS;
3. A resolution of 12 bit or more, but less than 14 bit, with a "sample rate" greater than 1,0 GSPS;
4. A resolution of 14 bit or more, but less than 16 bit, with a "sample rate" greater than 400 Mega Samples Per Second (MSPS); or
5. A resolution of 16 bit or more with a "sample rate" greater than 180 MSPS; and
b. Any of the following:
1. Storage of digitised data; or
2. Processing of digitised data;
N.B.1.
For ADC integrated circuits, see 3A001.a.5.a.
N.B.2.
For field programmable logic devices, see 3A001.a.7.
Technical Notes:
For the purposes of 3A001.a.14.:
1. A resolution of n bit corresponds to a quantisation of 2 n levels.
2. The resolution of the ADC is the number of bits of the digital output of the ADC that represents the measured analogue input. Effective Number of Bits (ENOB) is not used to determine the resolution of the ADC.
3. For integrated circuits with non-interleaving "multiple channel ADCs", the "sample rate" is not aggregated and the "sample rate" is the maximum rate of any single channel.
4. For integrated circuits with "interleaved ADCs" or with "multiple channel ADCs" that are specified to have an interleaved mode of operation, the "sample rates" are aggregated and the "sample rate" is the maximum combined total rate of all of the interleaved channels.
b. Microwave or millimetre wave items as follows:
Technical Note:
For the purposes of 3A001.b., the parameter peak saturated power output may also be referred to on product data sheets as output power, saturated power output, maximum power output, peak power output, or peak envelope power output.
1. "Vacuum electronic devices" and cathodes, as follows:
Note 1:
3A001.b.1. does not control "vacuum electronic devices" designed or rated for operation in any frequency band and having all of the following:
a. Does not exceed 31,8 GHz;
and
b. Is "allocated by the ITU" for radio-communications services, but not for radio-determination.
Note 2:
3A001.b.1. does not control non-"space-qualified" "vacuum electronic devices" having all of the following:
a. An average output power equal to or less than 50 W;
and
b. Designed or rated for operation in any frequency band and having all of the following:
1. Exceeds 31,8 GHz but does not exceed 43,5 GHz;
and
2. Is "allocated by the ITU" for radio-communications services, but not for radio-determination.
a. Travelling-wave "vacuum electronic devices", pulsed or continuous wave, as follows:
1. Devices operating at frequencies exceeding 31,8 GHz;
2. Devices having a cathode heater with a turn on time to rated RF power of less than 3 seconds;
3. Coupled cavity devices, or derivatives thereof, with a "fractional bandwidth" of more than 7 % or a peak power exceeding 2,5 kW;
4. Devices based on helix, folded waveguide, or serpentine waveguide circuits, or derivatives thereof, having any of the following:
a. An "instantaneous bandwidth" of more than one octave, and average power (expressed in kW) times frequency (expressed in GHz) of more than 0,5;
b. An "instantaneous bandwidth" of one octave or less, and average power (expressed in kW) times frequency (expressed in GHz) of more than 1;
c. Being "space-qualified"; or
d. Having a gridded electron gun;
5. Devices with a "fractional bandwidth" greater than or equal to 10 %, with any of the following:
a. An annular electron beam;
b. A non-axisymmetric electron beam; or
c. Multiple electron beams;
b. Crossed-field amplifier "vacuum electronic devices" with a gain of more than 17 dB;
c. Thermionic cathodes designed for "vacuum electronic devices" producing an emission current density at rated operating conditions exceeding 5 A/cm2 or a pulsed (non-continuous) current density at rated operating conditions exceeding 10 A/cm2;
d. "Vacuum electronic devices" with the capability to operate in a 'dual mode';
Technical Note:
For the purposes of 3A001.b.1.d., 'dual mode' means the "vacuum electronic device" beam current can be intentionally changed between continuous-wave and pulsed mode operation by use of a grid and produces a peak pulse output power greater than the continuous-wave output power.
2. "Monolithic Microwave Integrated Circuits" ("MMIC") amplifiers that are any of the following:
N.B. For "MMIC" amplifiers that have an integrated phase shifter, see 3A001.b.12.
a. Rated for operation at frequencies exceeding 2,7 GHz up to and including 6,8 GHz with a "fractional bandwidth" greater than 15 %, and having any of the following:
1. A peak saturated power output greater than 75 W (48,75 dBm) at any frequency exceeding 2,7 GHz up to and including 2,9 GHz;
2. A peak saturated power output greater than 55 W (47,4 dBm) at any frequency exceeding 2,9 GHz up to and including 3,2 GHz;
3. A peak saturated power output greater than 40 W (46 dBm) at any frequency exceeding 3,2 GHz up to and including 3,7 GHz; or
4. A peak saturated power output greater than 20 W (43 dBm) at any frequency exceeding 3,7 GHz up to and including 6,8 GHz;
b. Rated for operation at frequencies exceeding 6,8 GHz up to and including 16 GHz with a "fractional bandwidth" greater than 10 %, and having any of the following:
1. A peak saturated power output greater than 10 W (40 dBm) at any frequency exceeding 6,8 GHz up to and including 8,5 GHz; or
2. A peak saturated power output greater than 5 W (37 dBm) at any frequency exceeding 8,5 GHz up to and including 16 GHz;
c. Rated for operation with a peak saturated power output greater than 3 W (34,77 dBm) at any frequency exceeding 16 GHz up to and including 31,8 GHz, and with a "fractional bandwidth" of greater than 10 %;
d. Rated for operation with a peak saturated power output greater than 0,1 nW (-70 dBm) at any frequency exceeding 31,8 GHz up to and including 37 GHz;
e. Rated for operation with a peak saturated power output greater than 1 W (30 dBm) at any frequency exceeding 37 GHz up to and including 43,5 GHz, and with a "fractional bandwidth" of greater than 10 %;
f. Rated for operation with a peak saturated power output greater than 31,62 mW (15 dBm) at any frequency exceeding 43,5 GHz up to and including 75 GHz, and with a "fractional bandwidth" of greater than 10 %;
g. Rated for operation with a peak saturated power output greater than 10 mW (10 dBm) at any frequency exceeding 75 GHz up to and including 90 GHz, and with a "fractional bandwidth" of greater than 5 %; or
h. Rated for operation with a peak saturated power output greater than 0,1 nW (-70 dBm) at any frequency exceeding 90 GHz;
Note 1:
Not used.
Note 2:
The control status of the "MMIC" whose rated operating frequency includes frequencies listed in more than one frequency range, as defined by 3A001.b.2.a. to 3A001.b.2.h., is determined by the lowest peak saturated power output threshold.
Note 3:
Notes 1 and 2 in 3A mean that 3A001.b.2. does not control "MMICs" if they are specially designed for other applications, e.g., telecommunications, radar, automobiles.
3. Discrete microwave transistors that are any of the following:
a. Rated for operation at frequencies exceeding 2,7 GHz up to and including 6,8 GHz and having any of the following:
1. A peak saturated power output greater than 400 W (56 dBm) at any frequency exceeding 2,7 GHz up to and including 2,9 GHz;
2. A peak saturated power output greater than 205 W (53,12 dBm) at any frequency exceeding 2,9 GHz up to and including 3,2 GHz;
3. A peak saturated power output greater than 115 W (50,61 dBm) at any frequency exceeding 3,2 GHz up to and including 3,7 GHz; or
4. A peak saturated power output greater than 60 W (47,78 dBm) at any frequency exceeding 3,7 GHz up to and including 6,8 GHz;
b. Rated for operation at frequencies exceeding 6,8 GHz up to and including 31,8 GHz and having any of the following:
1. A peak saturated power output greater than 50 W (47 dBm) at any frequency exceeding 6,8 GHz up to and including 8,5 GHz;
2. A peak saturated power output greater than 15 W (41,76 dBm) at any frequency exceeding 8,5 GHz up to and including 12 GHz;
3. A peak saturated power output greater than 40 W (46 dBm) at any frequency exceeding 12 GHz up to and including 16 GHz; or
4. A peak saturated power output greater than 7 W (38,45 dBm) at any frequency exceeding 16 GHz up to and including 31,8 GHz;
c. Rated for operation with a peak saturated power output greater than 0,5 W (27 dBm) at any frequency exceeding 31,8 GHz up to and including 37 GHz;
d. Rated for operation with a peak saturated power output greater than 1 W (30 dBm) at any frequency exceeding 37 GHz up to and including 43,5 GHz;
e. Rated for operation with a peak saturated power output greater than 0,1 nW (-70 dBm) at any frequency exceeding 43,5 GHz; or
f. Other than those specified in 3A001.b.3.a. to 3A001.b.3.e and rated for operation with a peak saturated power output greater than 5 W (37,0 dBm) at all frequencies exceeding 8,5 GHz up to and including 31,8 GHz;
Note 1:
The control status of a transistor in 3A001.b.3.a. to 3A001.b.3.e. whose rated operating frequency includes frequencies listed in more than one frequency range, as defined by 3A001.b.3.a. to 3A001.b.3.e., is determined by the lowest peak saturated power output threshold.
Note 2:
3A001.b.3. includes bare dice, dice mounted on carriers, or dice mounted in packages. Some discrete transistors may also be referred to as power amplifiers, but the status of these discrete transistors is determined by 3A001.b.3.
4. Microwave solid-state amplifiers and microwave assemblies/modules containing microwave solid-state amplifiers, that are any of the following:
a. Rated for operation at frequencies exceeding 2,7 GHz up to and including 6,8 GHz with a "fractional bandwidth" greater than 15 %, and having any of the following:
1. A peak saturated power output greater than 500 W (57 dBm) at any frequency exceeding 2,7 GHz up to and including 2,9 GHz;
2. A peak saturated power output greater than 270 W (54,3 dBm) at any frequency exceeding 2,9 GHz up to and including 3,2 GHz;
3. A peak saturated power output greater than 200 W (53 dBm) at any frequency exceeding 3,2 GHz up to and including 3,7 GHz; or
4. A peak saturated power output greater than 90 W (49,54 dBm) at any frequency exceeding 3,7 GHz up to and including 6,8 GHz;
b. Rated for operation at frequencies exceeding 6,8 GHz up to and including 31,8 GHz with a "fractional bandwidth" greater than 10 %, and having any of the following:
1. A peak saturated power output greater than 70 W (48,45 dBm) at any frequency exceeding 6,8 GHz up to and including 8,5 GHz;
2. A peak saturated power output greater than 50 W (47 dBm) at any frequency exceeding 8,5 GHz up to and including 12 GHz;
3. A peak saturated power output greater than 30 W (44,77 dBm) at any frequency exceeding 12 GHz up to and including 16 GHz; or
4. A peak saturated power output greater than 20 W (43 dBm) at any frequency exceeding 16 GHz up to and including 31,8 GHz;
c. Rated for operation with a peak saturated power output greater than 0,5 W (27 dBm) at any frequency exceeding 31,8 GHz up to and including 37 GHz;
d. Rated for operation with a peak saturated power output greater than 2 W (33 dBm) at any frequency exceeding 37 GHz up to and including 43,5 GHz, and with a "fractional bandwidth" of greater than 10 %;
e. Rated for operation at frequencies exceeding 43,5 GHz and having any of the following:
1. A peak saturated power output greater than 0,2 W (23 dBm) at any frequency exceeding 43,5 GHz up to and including 75 GHz, and with a "fractional bandwidth" of greater than 10 %;
2. A peak saturated power output greater than 20 mW (13 dBm) at any frequency exceeding 75 GHz up to and including 90 GHz, and with a "fractional bandwidth" of greater than 5 %; or
3. A peak saturated power output greater than 0,1 nW (-70 dBm) at any frequency exceeding 90 GHz;
f. Not used;
N.B.1.
For "MMIC" amplifiers, see 3A001.b.2.
N.B.2.
For 'transmit/receive modules' and 'transmit modules', see 3A001.b.12.
N.B.3.
For converters and harmonic mixers, designed to extend the operating or frequency range of signal analysers, signal generators, network analysers or microwave test receivers, see 3A001.b.7.
Note 1:
Not used.
Note 2:
The control status of an item whose rated operating frequency includes frequencies listed in more than one frequency range, as defined by 3A001.b.4.a. to 3A001.b.4.e., is determined by the lowest peak saturated power output threshold.
5. Electronically or magnetically tunable band-pass or band-stop filters, having more than 5 tunable resonators capable of tuning across a 1,5:1 frequency band (fmax/fmin) in less than 10 μs and having any of the following:
a. A band-pass bandwidth of more than 0,5 % of centre frequency; or
b. A band-stop bandwidth of less than 0,5 % of centre frequency;
6. Not used;
7. Converters and harmonic mixers that are any of the following:
a. Designed to extend the frequency range of "signal analysers" beyond 110 GHz;
b. Designed to extend the operating range of signal generators as follows:
1. Beyond 110 GHz;
2. To an output power greater than 100 mW (20 dBm) anywhere within the frequency range exceeding 43,5 GHz but not exceeding 110 GHz;
c. Designed to extend the operating range of network analysers as follows:
1. Beyond 110 GHz;
2. To an output power greater than 100 mW (20 dBm) anywhere within the frequency range exceeding 43,5 GHz but not exceeding 110 GHz;
3. Not used;
d. Designed to extend the frequency range of microwave test receivers beyond 110 GHz;
8. Microwave power amplifiers containing "vacuum electronic devices" specified in 3A001.b.1. and having all of the following:
a. Operating frequencies above 3 GHz;
b. An average output power to mass ratio exceeding 80 W/kg; and
c. A volume of less than 400 cm3;
Note:
3A001.b.8. does not control equipment designed or rated for operation in any frequency band which is "allocated by the ITU" for radio-communications services, but not for radio-determination.
9. Microwave power modules (MPM) consisting of, at least, a travelling wave "vacuum electronic device", a "monolithic microwave integrated circuit" ("MMIC") and an integrated electronic power conditioner and having all of the following:
a. A 'turn-on time' from off to fully operational in less than 10 seconds;
b. A volume less than the maximum rated power in Watts multiplied by 10 cm3/W; and
c. An "instantaneous bandwidth" greater than 1 octave (fmax > 2fmin) and having any of the following:
1. For frequencies equal to or less than 18 GHz, an RF output power greater than 100 W; or
2. A frequency greater than 18 GHz;
Technical Notes:
1. For the purposes of 3A001.b.9.a. the 'turn-on time' refers to the time from fully-off to fully operational, i.e., it includes the warm-up time of the MPM.
2. For the purposes of 3A001.b.9.b., the following example is provided to calculate the volume: for a maximum rated power of 20 W, the volume would be: 20 W × 10 cm3/W = 200 cm3.
10. Oscillators or oscillator assemblies, specified to operate with a single sideband (SSB) phase noise, in dBc/Hz, less (better) than -(126 + 20log10F - 20log10f) anywhere within the range of 10 Hz ≤ F ≤ 10 kHz;
Technical Note:
For the purposes of 3A001.b.10., F is the offset from the operating frequency in Hz and f is the operating frequency in MHz.
11. 'Frequency synthesizer' "electronic assemblies" having a "frequency switching time" as specified by any of the following:
a. Less than 143 ps;
b. Less than 100 μs for any frequency change exceeding 2,2 GHz within the synthesised frequency range exceeding 4,8 GHz but not exceeding 31,8 GHz;
c. Not used;
d. Less than 500 μs for any frequency change exceeding 550 MHz within the synthesised frequency range exceeding 31,8 GHz but not exceeding 37 GHz;
e. Less than 100 μs for any frequency change exceeding 2,2 GHz within the synthesised frequency range exceeding 37 GHz but not exceeding 75 GHz;
f. Less than 100 μs for any frequency change exceeding 5,0 GHz within the synthesised frequency range exceeding 75 GHz but not exceeding 90 GHz; or
g. Less than 1 ms within the synthesised frequency range exceeding 90 GHz;
Technical Note:
For the purposes of 3A001.b.11., a 'frequency synthesizer' is any kind of frequency source, regardless of the actual technique used, providing a multiplicity of simultaneous or alternative output frequencies, from one or more outputs, controlled by, derived from or disciplined by a lesser number of standard (or master) frequencies.
N.B. For general purpose "signal analysers", signal generators, network analysers and microwave test receivers, see 3A002.c., 3A002.d., 3A002.e. and 3A002.f., respectively.
12. 'Transmit/receive modules', 'transmit/receive MMICs', 'transmit modules', and 'transmit MMICs', rated for operation at frequencies above 2,7 GHz and having all of the following:
a. A peak saturated power output (in watts), Psat, greater than 505,62 divided by the maximum operating frequency (in GHz) squared [Psat>505,62 W × GHz2/fGHz
2] for any channel;
b. A "fractional bandwidth" of 5 % or greater for any channel;
c. Any planar side with length d (in cm) equal to or less than 15 divided by the lowest operating frequency in GHz [d ≤ 15cm × GHz × N/fGHz] where N is the number of transmit or transmit/receive channels; and
d. An electronically variable phase shifter per channel.
Technical Notes:
For the purposes of 3A001.b.12.:
1. A 'transmit/receive module' is a multifunction "electronic assembly" that provides bi-directional amplitude and phase control for transmission and reception of signals.
2. A 'transmit module' is an "electronic assembly" that provides amplitude and phase control for transmission of signals.
3. A 'transmit/receive MMIC': is a multifunction "MMIC" that provides bi-directional amplitude and phase control for transmission and reception of signals.
4. A 'transmit MMIC' is a "MMIC" that provides amplitude and phase control for transmission of signals.
5. 2,7 GHz should be used as the lowest operating frequency (fGHz) in the formula in 3A001.b.12.c. for transmit/receive or transmit modules that have a rated operation range extending downward to 2,7 GHz and below [d≤15cm × GHz × N/2,7 GHz].
6. 3A001.b.12. applies to 'transmit/receive modules' or 'transmit modules' with or without a heat sink. The value of d in 3A001.b.12.c. does not include any portion of the 'transmit/receive module' or 'transmit module' that functions as a heat sink.
7. 'Transmit/receive modules', or 'transmit modules', or 'transmit/receive MMICs' or 'transmit MMICs' may or may not have N integrated radiating antenna elements where N is the number of transmit or transmit/receive channels.
c. Acoustic wave devices as follows and specially designed components therefor:
1. Surface acoustic wave and surface skimming (shallow bulk) acoustic wave devices, having any of the following:
a. A carrier frequency exceeding 6 GHz;
b. A carrier frequency exceeding 1 GHz but not exceeding 6 GHz and having any of the following:
1. A 'frequency side-lobe rejection' exceeding 65 dB;
2. A product of the maximum delay time and the bandwidth (time in μs and bandwidth in MHz) of more than 100;
3. A bandwidth greater than 250 MHz; or
4. A dispersive delay of more than 10 μs; or
c. A carrier frequency of 1 GHz or less and having any of the following:
1. A product of the maximum delay time and the bandwidth (time in μs and bandwidth in MHz) of more than 100;
2. A dispersive delay of more than 10 μs; or
3. A 'frequency side-lobe rejection' exceeding 65 dB and a bandwidth greater than 100 MHz;
Technical Note:
For the purposes of 3A001.c.1., 'frequency side-lobe rejection' is the maximum rejection value specified in data sheet.
2. Bulk (volume) acoustic wave devices which permit the direct processing of signals at frequencies exceeding 6 GHz;
3. Acoustic-optic "signal processing" devices employing interaction between acoustic waves (bulk wave or surface wave) and light waves which permit the direct processing of signals or images, including spectral analysis, correlation or convolution;
Note:
3A001.c. does not control acoustic wave devices that are limited to a single band pass, low pass, high pass or notch filtering, or resonating function.
d. Electronic devices and circuits containing components, manufactured from "superconductive" materials, specially designed for operation at temperatures below the "critical temperature" of at least one of the "superconductive" constituents and having any of the following:
1. Current switching for digital circuits using "superconductive" gates with a product of delay time per gate (in seconds) and power dissipation per gate (in watts) of less than 10-14 J; or
2. Frequency selection at all frequencies using resonant circuits with Q-values exceeding 10 000 ;
e. High energy devices as follows:
1. 'Cells' as follows:
a. 'Primary cells' having any of the following at 20 °C;
1. 'Energy density' exceeding 550 Wh/kg and a 'continuous power density' exceeding 50 W/kg; or
2. 'Energy density' exceeding 50 Wh/kg and a 'continuous power density' exceeding 350 W/kg; or
b. 'Secondary cells' having an 'energy density' exceeding 350 Wh/kg at 20 °C;
Technical Notes:
1. For the purposes of 3A001.e.1., 'energy density' (Wh/kg) is calculated from the nominal voltage multiplied by the nominal capacity in ampere-hours (Ah) divided by the mass in kilograms. If the nominal capacity is not stated, energy density is calculated from the nominal voltage squared then multiplied by the discharge duration in hours divided by the discharge load in ohms and the mass in kilograms.
2. For the purposes of 3A001.e.1., a 'cell' is defined as an electrochemical device, which has positive and negative electrodes, an electrolyte, and is a source of electrical energy. It is the basic building block of a battery.
3. For the purposes of 3A001.e.1.a., a 'primary cell' is a 'cell' that is not designed to be charged by any other source.
4. For the purposes of 3A001.e.1.b., a 'secondary cell' is a 'cell' that is designed to be charged by an external electrical source.
5. For the purposes of 3A001.e.1.a., 'continuous power density' (W/kg) is calculated from the nominal voltage multiplied by the specified maximum continuous discharge current in amperes (A) divided by the mass in kilograms. 'Continuous power density' is also referred to as specific power.
Note:
3A001.e.1. does not control batteries, including single-cell batteries.
2. High energy storage capacitors as follows:
N.B. SEE ALSO 3A201.a. and the Military Goods Controls.
a. Capacitors with a repetition rate of less than 10 Hz (single shot capacitors) and having all of the following:
1. A voltage rating equal to or more than 5 kV;
2. An energy density equal to or more than 250 J/kg; and
3. A total energy equal to or more than 25 kJ;
b. Capacitors with a repetition rate of 10 Hz or more (repetition rated capacitors) and having all of the following:
1. A voltage rating equal to or more than 5 kV;
2. An energy density equal to or more than 50 J/kg;
3. A total energy equal to or more than 100 J; and
4. A charge/discharge cycle life equal to or more than 10 000 ;
3. "Superconductive" electromagnets and solenoids, specially designed to be fully charged or discharged in less than one second and having all of the following:
N.B. SEE ALSO 3A201.b.
Note:
3A001.e.3. does not control "superconductive" electromagnets or solenoids specially designed for Magnetic Resonance Imaging (MRI) medical equipment.
a. Energy delivered during the discharge exceeding 10 kJ in the first second;
b. Inner diameter of the current carrying windings of more than 250 mm; and
c. Rated for a magnetic induction of more than 8 T or 'overall current density' in the winding of more than 300 A/mm2;
Technical Note:
For the purposes of 3A001.e.3.c., 'overall current density' is the total number of ampere-turns in the coil (i.e., the sum of the number of turns multiplied by the maximum current carried by each turn) divided by the total cross-section of the coil (comprising the superconducting filaments, the metallic matrix in which the superconducting filaments are embedded, the encapsulating material, any cooling channels, etc.).
4. Solar cells, cell-interconnect-coverglass (CIC) assemblies, solar panels, and solar arrays, which are "space-qualified", having a minimum average efficiency exceeding 20 % at an operating temperature of 301 K (28 °C) under simulated 'AM0' illumination with an irradiance of 1 367 watts per square metre (W/m2);
Technical Note:
For the purposes of 3A001.e.4., 'AM0', or 'Air Mass Zero', refers to the spectral irradiance of sun light in the earth's outer atmosphere when the distance between the earth and sun is one astronomical unit (AU).
f. Rotary input type absolute position encoders having an "accuracy" equal to or less (better) than 1,0 second of arc and specially designed encoder rings, discs or scales therefor;
g. Solid-state pulsed power switching thyristor devices and 'thyristor modules', using either electrically, optically, or electron radiation controlled switch methods and having any of the following:
1. A maximum turn-on current rate of rise (di/dt) greater than 30 000 A/μs and off-state voltage greater than 1 100 V; or
2. A maximum turn-on current rate of rise (di/dt) greater than 2 000 A/μs and having all of the following:
a. An off-state peak voltage equal to or greater than 3 000 V; and
b. A peak (surge) current equal to or greater than 3 000 A.
Note 1:
3A001.g. includes:
—
Silicon Controlled Rectifiers (SCRs);
—
Electrical Triggering Thyristors (ETTs);
—
Light Triggering Thyristors (LTTs);
—
Integrated Gate Commutated Thyristors (IGCTs);
—
Gate Turn-off Thyristors (GTOs);
—
MOS Controlled Thyristors (MCTs);
—
Solidtrons.
Note 2:
3A001.g. does not control thyristor devices and 'thyristor modules' incorporated into equipment designed for civil railway or "civil aircraft" applications.
Technical Note:
For the purposes of 3A001.g., a 'thyristor module' contains one or more thyristor devices.
h. Solid-state power semiconductor switches, diodes, or 'modules', having all of the following:
1. Rated for a maximum operating junction temperature greater than 488 K (215 °C);
2. Repetitive peak off-state voltage (blocking voltage) exceeding 300 V; and
3. Continuous current greater than 1 A.
Note 1:
Repetitive peak off-state voltage in 3A001.h. includes drain to source voltage, collector to emitter voltage, repetitive peak reverse voltage and peak repetitive off-state blocking voltage.
Note 2:
3A001.h. includes:
—
Junction Field Effect Transistors (JFETs);
—
Vertical Junction Field Effect Transistors (VJFETs);
—
Metal Oxide Semiconductor Field Effect Transistors (MOSFETs);
—
Double Diffused Metal Oxide Semiconductor Field Effect Transistor (DMOSFET);
—
Insulated Gate Bipolar Transistor (IGBT);
—
High Electron Mobility Transistors (HEMTs);
—
Bipolar Junction Transistors (BJTs);
—
Thyristors and Silicon Controlled Rectifiers (SCRs);
—
Gate Turn-Off Thyristors (GTOs);
—
Emitter Turn-Off Thyristors (ETOs);
—
PiN Diodes;
—
Schottky Diodes.
Note 3:
3A001.h. does not control switches, diodes, or 'modules', incorporated into equipment designed for civil automobile, civil railway or "civil aircraft" applications.
Technical Note:
For the purposes of 3A001.h., 'modules' contain one or more solid-state power semiconductor switches or diodes.
i. Intensity, amplitude, or phase electro-optic modulators, designed for analogue signals and having any of the following:
1. A maximum operating frequency of more than 10 GHz but less than 20 GHz, an optical insertion loss equal to or less than 3 dB and having any of the following:
a. A 'half-wave voltage' ('Vπ') less than 2,7 V when measured at a frequency of 1 GHz or below; or
b. A 'Vπ' of less than 4 V when measured at a frequency of more than 1 GHz; or
2. A maximum operating frequency equal to or greater than 20 GHz, an optical insertion loss equal to or less than 3 dB and having any of the following:
a. A 'Vπ' less than 3,3 V when measured at a frequency of 1 GHz or below; or
b. A 'Vπ' less than 5 V when measured at a frequency of more than 1 GHz.
Note:
3A001.i. includes electro-optic modulators having optical input and output connectors (e.g., fibre-optic pigtails).
Technical Note:
For the purposes of 3A001.i., a 'half-wave voltage' ('Vπ') is the applied voltage necessary to make a phase change of 180 degrees in the wavelength of light propagating through the optical modulator.